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      The development history of integrated circuit packaging technology

      The evolution of IC package technology mainly in order to meet the demand for the terminal system, with the development trend of multi task system products and small volume, the evolution direction of IC package technology for high density and high pin, thin and small. On the technical level of the chip packaging division of semiconductor industry have different standards, current domestic standards with taking package chip and substrate to divide, generally speaking, the development of the integrated circuit encapsulation technology can be divided into four stages:
      The first phase: 1980s years ago (Jack in the original era).
      The main technical package is inserted into the pin (PTH), which is characterized by jack mounted to the PCB, the main form of SIP, DIP, PGA, the deficiency of which is difficult to improve the density, frequency, it is difficult to meet the requirements of efficient automatic production.
      The second stage: in the middle of 1980s (surface mount times).
      The main features of surface mount package is to replace the lead pins, lead for the wing or the T-shaped sides or quad, pitch of 1.27 to 0.4mm, suitable for 3-300 lead, surface mount technology has changed the traditional PTH cartridge, with minor lead integrated circuit mounted to the PCB board. The main form of SOP (small outline package), PLCC (plastic leaded chip carrier), PQFP (plastic quad flat package), J lead QFJ and SOJ, LCCC (non leaded ceramic chip carrier), etc.. Their main advantages are thin wire, short distance, small spacing, packing density, improved electrical performance, small size, light weight, easy automatic production. The disadvantages of them are that it is difficult to meet the needs of the development of ASIC and microprocessor in terms of packing density, I/O number and circuit frequency.
      The third stage: the second leap in 1990s, entered the era of the area array package.
      This phase is mainly in the form of solder ball array package (BGA), chip size package (CSP), no lead quad flat package (PQFN), multi chip module (MCM). BGA technology allows the package occupies a larger volume and weight of the "pin" by "ball" is replaced, connection distance between the chip and the system is greatly shortened, the successful development of BGA technology, which has been lagging behind the development of chip chip package finally catch up with the pace of development. CSP technology solves the long existence of small and large chip package and the fundamental contradiction, led to a revolution in integrated circuit packaging technology.
      The fourth stage: in twenty-first Century, ushered in the microelectronics packaging technology packaging era, it has a revolutionary change in the concept of packaging, from the original concept of packaging components evolved into the packaging system.
      At present, the mainstream of the global semiconductor packaging is in the third stage of the mature period, PQFN and BGA and other major packaging technology for mass production, some products have begun to develop in the fourth phase. The WLCSP encapsulation technology that the publisher has mastered can be stacked in a stacked package, and the MEMS chip of the issuer is packaged in a stacked 3D package.

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